1. Field of the Invention
This invention relates to a main storage configuration control system, and more particularly to a main storage configuration control system for a data processing system in which a main storage unit, which comprises a main storage and a main storage controller, is combined with a central processor unit. The main storage comprises a plurality of configuration units from and in which storage information is simultaneously read and written.
2. Description of the Prior Art
In a system in which the main storage comprises a plurality of configuration units, an arrangement that permits free selection of each configuration unit is required. To this end, it is customary in the prior art to provide, in the main storage controller, an address translation circuit, formed by a switching circuit or jumper circuit, for translation of an address bit. A circuit for decoding the address after this translation is provided to determine which one of the configuration units is activated. In the alternative, an arrangement which holds an address to be accessed for each configuration unit and compares it with an address from the central processor unit and activates the configuration unit whose address coincides with that from the central processor unit, may be employed. Such a coventional method, however, involves the use of the address translation circuit, the configuration selector circuit or the address comparator for each configuration unit, and hence greatly affects the performance and reliability of the data processing system.